1. Field of the Invention
The present invention relates generally to electronic packaging technology and, more particularly, to a semiconductor package using a circuit film as a substrate.
2. Description of the Related Art
With the current trend of high integration in semiconductor devices, related assembly technology for packaging and interconnecting the semiconductor devices is becoming increasingly important. Consequently, there is a growing tendency to make semiconductor packages smaller, thinner, lighter, and more multifunctional. For example, the increased market demands for mobile handsets and liquid crystal displays (LCDs) have influenced semiconductor packaging. To meet these needs, several types of packages using a circuit film as a substrate have been developed and introduced in the art.
FIGS. 1A to 1C show cross-sectional views of a conventional circuit film 10 and a related fabrication process. Referring to FIGS. 1A to 1C, the circuit film 10 is based on a thin, flexible, insulating base film 11. A circuit pattern 12 is formed on the base film 11 and then coated with a metal coating layer 13. A resultant structure on the base film 11 is covered with a protective layer 14 except one end of each circuit pattern 12 coated with the metal layer 13. The non-covered end of the circuit pattern 12 is then connected with an integrated circuit (IC) chip.
FIG. 2 illustrates a cross-sectional view of a conventional film package 30 using the circuit film 10. This illustrates a chip-on-film (COF) package. As shown in FIG. 2, the circuit pattern 12 is connected with a chip bump 23 of the IC chip 20. The IC chip 20 has a number of input/output (I/O) pads 22 on an active surface 21, with a chip bump 23 formed on each I/O pad 22. In addition, a sealing resin 31 between the circuit film 10 and the IC chip 20 protects and supports the circuit pattern 12 and the chip bump 23.
As discussed, in a conventional film package 30 the chip bumps 23 physically join and electrically couple the circuit film 10 and the IC chip 20. Typically, the chip bumps 23 are made of gold, solder, or other various metals, and have a desired height.
FIGS. 3A to 3C show, in cross-sectional views, a conventional method of forming the chip bumps 23. Referring to FIGS. 3A to 3C, first of all, an under bump metal (UBM) 24 is deposited on the active surface of the IC chip 20. Then, a photoresist material is coated on the UBM 24 and patterned to form a photoresist pattern 25 exposing the I/O pads 22. Next, a bump material is plated on the I/O pads 22 through the photoresist pattern 25 to form the chip bumps 23. Thereafter, the photoresist pattern 25 is removed, and the UBM 24 is selectively etched using the chip bumps 23 as an etching mask.
Since the conventional film package 30 uses the chip bumps 23 formed by the above-discussed method, related fabrication processes may be complicated and lengthy, and fabrication cost may be increased.